aon7401 30v p-channel mosfet general description product summary v ds i d (at v gs =-10v) -35a r ds(on) (at v gs =-10v) < 14m w r ds(on) (at v gs =-6v) < 17m w 100% uis tested 100% r g tested symbol v the aon7401 uses advanced trench technology to provide excellent r ds(on) , and ultra-low low gate charge with a 25v gate rating. this device is suitable for use as a load switch or in pwm applications. maximum units parameter absolute maximum ratings t a =25c unless otherwise noted -30v drain-source voltage v -30 dfn 3x3_ep top view bottom view pin 1 top view 12 3 4 8 76 5 g d s v ds v gs i dm t j , t stg symbol t 10s steady-state steady-state r q jl w t a =70c 2 junction and storage temperature range -55 to 150 c power dissipation a t a =25c p dsm 3.1 -12 power dissipation b t c =25c p d 29 w t c =100c 12 continuous drain current t c =25c i d -35 a t a =70c -9.7 continuous drain current t a =25c i dsm c/w c/w maximum junction-to-ambient a d 3.5 75 a t c =100c -23 pulsed drain current c -80 typ 4.2 maximum junction-to-ambient a drain-source voltage v gate-source voltage 25 v maximum junction-to-lead max -30 c/w r q ja 30 60 40 thermal characteristics units parameter rev 4: mar. 2011 www.aosmd.com page 1 of 5
aon7401 symbol min typ max units bv dss -30 v v ds =-30v, v gs =0v -1 t j =55c -5 i gss 100 na v gs(th) gate threshold voltage -1.7 -2.2 -3 v i d(on) -80 a 11 14 t j =125c 16 19 12.9 17 m w g fs 27 s v sd -0.7 -1 v i s -25 a c iss 2060 2600 pf c oss 370 pf c rss 295 pf r g 2.4 3.6 w q g (10v) 30 39 nc q gs 4.6 nc q gd 10 nc t d(on) 11 ns t r 9.4 ns t 24 ns v gs =0v, v ds =-15v, f=1mhz switching parameters v ds =0v, v gs = 25v zero gate voltage drain current gate-body leakage current drain-source breakdown voltage on state drain current i d =-250 m a, v gs =0v v gs =-10v, v ds =-5v v gs =-10v, i d =-9a reverse transfer capacitance i s =-1a,v gs =0v v ds =-5v, i d =-9a v gs =-6v, i d =-7a diode forward voltage electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions i dss m a v ds =v gs i d =-250 m a r ds(on) static drain-source on-resistance m w forward transconductance gate resistance v gs =0v, v ds =0v, f=1mhz total gate charge v gs =-10v, v ds =-15v, i d =-9a gate source charge gate drain charge maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =-10v, v ds =-15v, r l =1.6 w , r =3 w t d(off) 24 ns t f 12 ns t rr 14 18 ns q rr 35 nc this product has been designed and qualified for th e consumer market. applications or uses as critical components in life support devices or systems are n ot authorized. aos does not assume any liability ar ising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. i f =-9a, di/dt=500a/ m s body diode reverse recovery time turn-off fall time body diode reverse recovery charge i f =-9a, di/dt=500a/ m s turn-off delaytime r gen =3 w a. the value of rqja is measured with the device mo unted on 1in2 fr-4 board with 2oz. copper, in a sti ll air environment with ta =25 c. the power dissipation pdsm is based on r qja t 10s value and the maximum allowed junction temperat ure of 150 c. the value in any given application depends on the user's specific board de sign, and the maximum temperature of 150 c may be used if the pcb allows it. b. the power dissipation pd is based on tj(max)=150 c, using junction-to-case thermal resistance, and i s more useful in setting the upper dissipation limit for cases where additional heatsi nking is used. c. repetitive rating, pulse width limited by juncti on temperature tj(max)=150 c. ratings are based on low frequency and duty cycl es to keep initial tj =25 c. d. the rqja is the sum of the thermal impedence fro m junction to case rqjc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300ms pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case t hermal impedence which is measured with the device mounted to a large heatsink, assuming a maximum junction temperature of tj(max)=150 c. the soa curve provides a single pulse rating. g. the maximum current rating is package limited. h. these tests are performed with the device mounte d on 1 in2 fr-4 board with 2oz. copper, in a still air environment with ta=25 c. rev 4: mar. 2011 www.aosmd.com page 2 of 5
aon7401 typical electrical and thermal characteristics 17 52 10 0 18 0 20 40 60 80 1 2 3 4 5 6 -i d (a) -v gs (volts) figure 2: transfer characteristics (note e) 6 8 10 12 14 16 0 5 10 15 20 r ds(on) (m w ww w ) -i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 normalized on-resistance temperature (c) figure 4: on-resistance vs. junction temperature (note e) v gs =-6v i d =-7a v gs =-10v i d =-9a 25 c 125 c v ds =-5v v gs =-6v v gs =-10v 0 20 40 60 80 0 1 2 3 4 5 -i d (a) -v ds (volts) fig 1: on-region characteristics (note e) v gs =-3.5v -4v -10v -5v -6v -4.5v 40 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 i s (a) v sd (volts) figure 6: body-diode characteristics (note e) 125 25 (note e) 5 10 15 20 25 30 2 4 6 8 10 r ds(on) (m w ww w ) -v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) i d =-9a 25 c 125 c rev 4: mar. 2011 www.aosmd.com page 3 of 5
aon7401 typical electrical and thermal characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 -v gs (volts) q g (nc) figure 7: gate-charge characteristics 0 400 800 1200 1600 2000 2400 2800 3200 0 5 10 15 20 25 30 capacitance (pf) -v ds (volts) figure 8: capacitance characteristics c iss c oss c rss v ds =-15v i d =-9a 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 power (w) pulse width (s) figure 10: single pulse power rating junction-to- ambient (note f) t a =25 0.0 0.1 1.0 10.0 100.0 1000.0 0.01 0.1 1 10 100 -i d (amps) -v ds (volts) figure 9: maximum forward biased safe operating area (note f) 10 m s 10s 1ms dc r ds(on) limited t j(max) =150 c t a =25 c 100 m s 10ms 100ms ambient (note f) operating area (note f) 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 z q qq q ja normalized transient thermal resistance pulse width (s) figure 11: normalized maximum transient thermal imp edance (note f) single pulse d=t on /t t j,pk =t a +p dm .z q ja .r q ja t on t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse r q ja =75 c/w rev 4: mar. 2011 www.aosmd.com page 4 of 5
aon7401 vdc ig vds dut vdc vgs vgs qg qgs qgd charge gate charge test circuit & waveform - + - + -10v vdd id vgs vds unclamped inductive switching (uis) test circuit & waveforms vds l - 2 e = 1/2 li ar ar bv dss vdc dut vdd vgs vds vgs rl rg resistive switching test circuit & waveforms - + vgs vds t t t t t t 90% 10% r on d(off) f off d(on) vdd vgs vgs rg dut vdc vgs id vgs - + i ar ig vgs - + vdc dut l vgs isd diode recovery test circuit & waveforms vds - vds + di/dt rm rr vdd vdd q = - idt t rr -isd -vds f -i -i rev 4: mar. 2011 www.aosmd.com page 5 of 5
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